1. Field of the Invention
This invention relates to the field of semiconductor circuits, and more specifically to the field of integrated circuit input buffers.
2. Prior Art
Most present integrated circuits, such as microprocessors, have operating voltages V.sub.CC of approximately 5 volts. These circuits normally receive TTL level inputs, that is, they receive inputs in the 0-0.8 volt range to constitute a logical low signal, and inputs in the 2.0-5.0 volt range to constitute a logical high signal. Input buffers are provided for buffering and to convert TTL level inputs into 5 volt CMOS level signals which are utilized by the integrated circuit. With five volt CMOS level signals a logical low signal is represented by 0 volts and a logical high signal is represented by 5 volts only. Input buffers which input TTL level signals and output 5 volt CMOS level signals are well known in the art. These circuits are ideally designed so that they provide proper switching worst case scenarios; such as when a previous low TTL level input of 0.8 volts switches to a high TTL level input of only 2.0 volts. Ideally, input buffers which input TTL level signals are designed to toggle outputs at the midpoint, 1.4 volts, of the two worst case inputs.
Many modern integrated circuits, in order to decrease power dissipation, can now operate at 3 volts V.sub.CC as well as at 5 volts V.sub.CC. Microprocessors which can operate in both a 3 volt and a 5 volt environment require two input buffers for each input signal. One input buffer tuned for receiving TTL level inputs when operating at 5 volts V.sub.CC, and a second input buffer tuned for TTL level inputs when operating at 3 volts V.sub.CC.
In the prior art, the two input buffers are connected to a 1:2 MUX. The 1:2 MUX enables one of the two input buffers, depending upon operating environment. This technique, however, is expensive because it requires two buffers and a MUX for each input of the integrated circuit. Since there are literally hundreds of inputs to modern integrated circuits, this technique requires substantial silicon area. Silicon area is always of limited supply in modern integrated circuits.
Thus, what is needed is a single input buffer which can provide proper buffering for two different operating modes, a 5 volt mode where the buffer inputs TTL level signals and outputs 5 volts CMOS level signals while operating at 5 volts V.sub.CC and a 3 volt mode where the buffer inputs TTL level signals and outputs 3 volt CMOS signals while operating at 3 volts V.sub.CC.